Digital System Design 

項目符號

Text Book :

David Money Harris & Sarah L. Harris "Digital Design and Computer Architecture"

Morgan Kaufmann Publishers

 

項目符號

Course Schedule :

 

Week#

Lecture

Homework

1

1.1~1.4(Lecture Note 1)

1.35, 1.43, 1.44, 1.49, 1.52, 1.58, 1.59 (只接受手寫本哦！)

9/26 12:00 前交 。  Solution of HW1

分組翻譯CMOS製程(9/28 12:00 前交)，隔日上課使用。全文

2

中秋節調課

 

3

1.5~2.3(Lecture Note 2)

2.3~2.6(Lecture Note 3) refer to Chap04 of 951

1.61, 2.7, 2.8(using CMOS circuit), 2.18, 2.19。Solution of HW2

10/09 12:00 前交 。

4

Adder Design with Altera Design Lab

Implement a 4-bit adder with CPLD

10/08 當天驗收

5

2.7~ (Lecture Note 4)

Digital Building Blocks (Multiplexer, Decoder, Encoder)

有關Glitch 請參考 Chap08 of 951

HW3 (Solution)

10/22 19:00 前交

6

3.1~3.2 Latches & Flip-Flop (Lecture Note 4)

3.1, 3.2, 3.3,

10/29 12:00 前交

7

3.4 FSM Design

 

I.  3.6, 3.7, 3.19, 3.21 11/8 12:00 前交(延期!) (Solution)

II. Implement 3.25 on Altera Board, use a push button as input and show the result on LEDs. (To obtain a 1-Hz clock, you can use 24 T-FFs to divide the 16MHz clock on the board as shown below, 2**24=16M) 11/19 22:00 前由助教驗收並詢問問題。(延期!)

3.5

3.4 FSM Design with other types' flip-flops

 

　期中考考至 3.4

9

Mid-Term Exam.

　

10

4. VHDL (Refer to Chapter 10 & Chapter 17 of last year's course)

5.1~5.2(Lecture Note 9)

　

11

5.3(Lecture Note 10)

　

12

5.4~5.5(Lecture Note 11)

 

13

5.6(Lecture Note 12)

　

14

6.1~6.3(Lecture Note 13)

　

15

6.4(Lecture Note 14)

 

16

6.5~6.6(Lecture Note 15)

 

17

　

 

18

Final Exam(LAB)

 

　

(Lecture Note 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)

　

Grading 

n      Assignments: Weekly problem sets (10%)

n      Semester labs (電子鐘15% + 組合語言程式15%)

n      Midterm (25%)

n      Final (35%)

TA: 

洪振耀